pub struct Config {
pub baudrate: Hertz,
pub data_mode: Mode,
pub write_only: bool,
pub duplex: Duplex,
pub bit_order: BitOrder,
pub cs_active_high: bool,
pub cs_pre_delay_us: Option<u16>,
pub cs_post_delay_us: Option<u8>,
pub input_delay_ns: i32,
pub polling: bool,
pub allow_pre_post_delays: bool,
pub queue_size: usize,
}
Expand description
SPI Device configuration
Fields§
§baudrate: Hertz
§data_mode: Mode
§write_only: bool
This property can be set to configure a SPI Device for being write only Thus the flag SPI_DEVICE_NO_DUMMY will be passed on initialization and it will unlock the possibility of using 80Mhz as the bus freq See https://docs.espressif.com/projects/esp-idf/en/latest/esp32/api-reference/peripherals/spi_master.html#timing-considerations
duplex: Duplex
§bit_order: BitOrder
§cs_active_high: bool
§cs_pre_delay_us: Option<u16>
On Half-Duplex transactions: cs_pre_delay_us % 16
corresponds to the number of SPI bit-cycles cs should be activated before the transmission.
On Full-Duplex transactions: cs_pre_delay_us != 0
will add 1 microsecond of cs activation before transmission
cs_post_delay_us: Option<u8>
< Amount of SPI bit-cycles the cs should stay active after the transmission (0-16)
input_delay_ns: i32
§polling: bool
§allow_pre_post_delays: bool
§queue_size: usize
Implementations§
source§impl Config
impl Config
pub fn new() -> Config
pub fn baudrate(self, baudrate: Hertz) -> Config
pub fn data_mode(self, data_mode: Mode) -> Config
pub fn write_only(self, write_only: bool) -> Config
pub fn duplex(self, duplex: Duplex) -> Config
pub fn bit_order(self, bit_order: BitOrder) -> Config
pub fn cs_active_high(self) -> Config
sourcepub fn cs_pre_delay_us(self, delay_us: u16) -> Config
pub fn cs_pre_delay_us(self, delay_us: u16) -> Config
On Half-Duplex transactions: cs_pre_delay_us % 16
corresponds to the number of SPI bit-cycles cs should be activated before the transmission
On Full-Duplex transactions: cs_pre_delay_us != 0
will add 1 microsecond of cs activation before transmission
sourcepub fn cs_post_delay_us(self, delay_us: u8) -> Config
pub fn cs_post_delay_us(self, delay_us: u8) -> Config
Add an aditional Amount of SPI bit-cycles the cs should be activated after the transmission (0-16). This only works on half-duplex transactions.
pub fn input_delay_ns(self, input_delay_ns: i32) -> Config
pub fn polling(self, polling: bool) -> Config
pub fn allow_pre_post_delays(self, allow_pre_post_delays: bool) -> Config
pub fn queue_size(self, queue_size: usize) -> Config
Trait Implementations§
Auto Trait Implementations§
impl Freeze for Config
impl RefUnwindSafe for Config
impl Send for Config
impl Sync for Config
impl Unpin for Config
impl UnwindSafe for Config
Blanket Implementations§
§impl<T> Any for Twhere
T: 'static + ?Sized,
impl<T> Any for Twhere
T: 'static + ?Sized,
§impl<T> Borrow<T> for Twhere
T: ?Sized,
impl<T> Borrow<T> for Twhere
T: ?Sized,
§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
§default unsafe fn clone_to_uninit(&self, dst: *mut T)
default unsafe fn clone_to_uninit(&self, dst: *mut T)
clone_to_uninit
)