Constant esp_idf_svc::sys::adc_ulp_mode_t_ADC_ULP_MODE_RISCV
source ยท pub const adc_ulp_mode_t_ADC_ULP_MODE_RISCV: u32 = 2; // 2u32
Expand description
< ADC is controlled by ULP RISCV
pub const adc_ulp_mode_t_ADC_ULP_MODE_RISCV: u32 = 2; // 2u32
< ADC is controlled by ULP RISCV