Struct esp_idf_svc::hal::sys::spi_bus_config_t
source · #[repr(C)]pub struct spi_bus_config_t {Show 13 fields
pub __bindgen_anon_1: spi_bus_config_t__bindgen_ty_1,
pub __bindgen_anon_2: spi_bus_config_t__bindgen_ty_2,
pub sclk_io_num: i32,
pub __bindgen_anon_3: spi_bus_config_t__bindgen_ty_3,
pub __bindgen_anon_4: spi_bus_config_t__bindgen_ty_4,
pub data4_io_num: i32,
pub data5_io_num: i32,
pub data6_io_num: i32,
pub data7_io_num: i32,
pub max_transfer_sz: i32,
pub flags: u32,
pub isr_cpu_id: u32,
pub intr_flags: i32,
}
Expand description
@brief This is a configuration structure for a SPI bus.
You can use this structure to specify the GPIO pins of the bus. Normally, the driver will use the GPIO matrix to route the signals. An exception is made when all signals either can be routed through the IO_MUX or are -1. In that case, the IO_MUX is used, allowing for >40MHz speeds.
@note Be advised that the slave driver does not use the quadwp/quadhd lines and fields in spi_bus_config_t refering to these lines will be ignored and can thus safely be left uninitialized.
Fields§
§__bindgen_anon_1: spi_bus_config_t__bindgen_ty_1
§__bindgen_anon_2: spi_bus_config_t__bindgen_ty_2
§sclk_io_num: i32
< GPIO pin for SPI Clock signal, or -1 if not used.
__bindgen_anon_3: spi_bus_config_t__bindgen_ty_3
§__bindgen_anon_4: spi_bus_config_t__bindgen_ty_4
§data4_io_num: i32
< GPIO pin for spi data4 signal in octal mode, or -1 if not used.
data5_io_num: i32
< GPIO pin for spi data5 signal in octal mode, or -1 if not used.
data6_io_num: i32
< GPIO pin for spi data6 signal in octal mode, or -1 if not used.
data7_io_num: i32
< GPIO pin for spi data7 signal in octal mode, or -1 if not used.
max_transfer_sz: i32
< Maximum transfer size, in bytes. Defaults to 4092 if 0 when DMA enabled, or to SOC_SPI_MAXIMUM_BUFFER_SIZE
if DMA is disabled.
flags: u32
< Abilities of bus to be checked by the driver. Or-ed value of SPICOMMON_BUSFLAG_*
flags.
isr_cpu_id: u32
< Select cpu core to register SPI ISR.
intr_flags: i32
< Interrupt flag for the bus to set the priority, and IRAM attribute, see
esp_intr_alloc.h
. Note that the EDGE, INTRDISABLED attribute are ignored
by the driver. Note that if ESP_INTR_FLAG_IRAM is set, ALL the callbacks of
the driver, and their callee functions, should be put in the IRAM.
Trait Implementations§
source§impl Clone for spi_bus_config_t
impl Clone for spi_bus_config_t
source§fn clone(&self) -> spi_bus_config_t
fn clone(&self) -> spi_bus_config_t
1.0.0§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source
. Read moresource§impl Default for spi_bus_config_t
impl Default for spi_bus_config_t
source§fn default() -> spi_bus_config_t
fn default() -> spi_bus_config_t
impl Copy for spi_bus_config_t
Auto Trait Implementations§
impl Freeze for spi_bus_config_t
impl RefUnwindSafe for spi_bus_config_t
impl Send for spi_bus_config_t
impl Sync for spi_bus_config_t
impl Unpin for spi_bus_config_t
impl UnwindSafe for spi_bus_config_t
Blanket Implementations§
§impl<T> Any for Twhere
T: 'static + ?Sized,
impl<T> Any for Twhere
T: 'static + ?Sized,
§impl<T> Borrow<T> for Twhere
T: ?Sized,
impl<T> Borrow<T> for Twhere
T: ?Sized,
§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
§default unsafe fn clone_to_uninit(&self, dst: *mut T)
default unsafe fn clone_to_uninit(&self, dst: *mut T)
clone_to_uninit
)§impl<T> CloneToUninit for Twhere
T: Copy,
impl<T> CloneToUninit for Twhere
T: Copy,
§unsafe fn clone_to_uninit(&self, dst: *mut T)
unsafe fn clone_to_uninit(&self, dst: *mut T)
clone_to_uninit
)