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§Direct Memory Access (DMA)
§Overview
The DMA driver provides an interface to efficiently transfer data between different memory regions and peripherals within the ESP microcontroller without involving the CPU. The DMA controller is responsible for managing these data transfers.
Notice, that this module is a common version of the DMA driver, ESP32
and
ESP32-S2
are using older PDMA
controller, whenever other chips are using
newer GDMA
controller.
§Examples
§Initialize and utilize DMA controller in SPI
let dma_channel = peripherals.DMA_SPI2;
let sclk = peripherals.GPIO0;
let miso = peripherals.GPIO2;
let mosi = peripherals.GPIO4;
let cs = peripherals.GPIO5;
let mut spi = Spi::new(
peripherals.SPI2,
Config::default().with_frequency(100.kHz()).with_mode(Mode::_0)
)
.unwrap()
.with_sck(sclk)
.with_mosi(mosi)
.with_miso(miso)
.with_cs(cs)
.with_dma(dma_channel);
⚠️ Note: Descriptors should be sized as (max_transfer_size + CHUNK_SIZE - 1) / CHUNK_SIZE
.
I.e., to transfer buffers of size 1..=CHUNK_SIZE
, you need 1 descriptor.
⚠️ Note: For chips that support DMA to/from PSRAM (ESP32-S3) DMA transfers to/from PSRAM have extra alignment requirements. The address and size of the buffer pointed to by each descriptor must be a multiple of the cache line (block) size. This is 32 bytes on ESP32-S3.
For convenience you can use the crate::dma_buffers macro.
Re-exports§
pub use as_mut_byte_array;
Structs§
- An I2S-compatible type-erased DMA channel.
- The RX half of an arbitrary I2S DMA channel.
- The TX half of an arbitrary I2S DMA channel.
- An SPI-compatible type-erased DMA channel.
- The RX half of an arbitrary SPI DMA channel.
- The TX half of an arbitrary SPI DMA channel.
- DMA Channel
- A DMA transfer descriptor.
- DMA descriptor flags.
- DMA Loop Buffer
- DMA receive buffer
- DMA Streaming Receive Buffer.
- A view into a DmaRxStreamBuf
- DMA transmit and receive buffer.
- DMA transaction for RX only transfers
- DMA transaction for RX only circular transfers
- DMA transaction for TX+RX transfers
- DMA transaction for TX only transfers
- DMA transaction for TX only circular transfers
- DMA transmit buffer
- An empty buffer that can be used when you don’t need to transfer any data.
- DMA channel suitable for I2S0
- DMA channel suitable for I2S1
- Holds all the information needed to configure a DMA channel for a transfer.
- DMA channel suitable for SPI2
- DMA channel suitable for SPI3
Enums§
- Burst transfer configuration.
- DMA buffer alignment errors.
- Error returned from Dma[Rx|Tx|RxTx]Buf operations.
- DMA Errors
- Kinds of interrupt to listen to.
- DMA Priorities The values need to match the TRM
- Types of interrupts emitted by the RX channel.
- Types of interrupts emitted by the TX channel.
- The owner bit of a DMA descriptor.
- The direction of the DMA transfer.
Constants§
- The default chunk size used for DMA transfers.
Traits§
- A description of a DMA Channel.
- Trait implemented for DMA channels that are compatible with a particular peripheral.
- DmaRxBuffer is a DMA descriptor + memory combo that can be used for receiving data from a peripheral’s FIFO to a DMA channel.
- DmaTxBuffer is a DMA descriptor + memory combo that can be used for transmitting data from a DMA channel to a peripheral’s FIFO.
- Trait for buffers that can be given to DMA for reading.
- Trait implemented for the RX half of split DMA channels that are compatible with a particular peripheral. Accepts complete DMA channels or split halves.
- Trait implemented for the TX half of split DMA channels that are compatible with a particular peripheral. Accepts complete DMA channels or split halves.
- Trait for buffers that can be given to DMA for writing.
Functions§
- Computes the number of descriptors required for a given buffer size with a given chunk size.
Type Aliases§
- Helper type to get the DMA (Rx and Tx) channel for a peripheral.
- Helper type to get the DMA Rx channel for a peripheral.
- Helper type to get the DMA Tx channel for a peripheral.